Designed a 4-bit counter using a J-K flip-flop that has a clocked input with reset. Performed simulations of various output parameters like rise time and fall time. The design is done using cadence ...

For the last part of my Illogical Logic series I want to show how we can take what we have looked at so far and use it in one small project – to build a counter with a 7 segment display. For the last ...